Galanina N.A., Dmitriev D.D. Synthesis of FFT on FPGA using the system of residual classes

Abstract: the presence of the DSP-block and a large number of I/O ports in modern FPGAs allows to use them for a successful synthesis of the digital signal processing algorithms. The system of residual classes involves multithreading of computations, thus FPGAs are very well suited for the implementation of these algorithms, since the computations in the channels of the system of residual classes are carried out in parallel and independent from each other. It is known that the FPGA is a microchip, the logic of which is not determined on creation but is set up by programming in specialized software, such as Quartus II. Developers of the special processors DSP are highly interested in the realization of FFT using the system of residual classes on FPGA Altera Cyclone II. The article shows the results of the development of the conriguration file for realization of FFT using the system of residual classes on FPGA Altera Cyclone II in the development environment Altera Quartus II using the Verilog language of the hardware description. The author describes the FPGA work under the developed configuration file. The article presents timing characteristics and estimated calculation errors.

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